Transient Fault Correction Technology

Transient Fault Correction Technology
A gateway of Reliable Semiconductor Chips

Semiconductor Chips can encounter Soft, Non-Permanent, Runtime transient logical and data corruption while operating in Real World.

The issues like Power Glitch, EMP/ EMI (Electromagnetic Pulse/ Interference/ Coupling), and lots of environmental issues which can induce a Runtime Logical or Data corruption on a semiconductor chip logic and distract its working flow and impact the working in the runtime in a Random way.

GreenIPcore Self Fault Correction Technology helps achieve a better Reliability for products.

Experience reliability at the logic level.
Grows market and create great customer value.

IPs with Self Fault Correcting Feature

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Features & Benefits


The Improvement -
Transient Fault Correction technology provides reliability at runtime without interrupting the functioning of the existing system.

The Reliability -
The self correcting functional logic keep working correctly even when transient faults and soft errors keep occurring by any means including impact of any EMI/ EMP/ Radiation/ Charge Disturbance or any other impact from within or outside the chip.


Technology -
Logic can be synthesized on any FPGA, CPLD and ASIC at any node.

Market -
Same IP is capable of improving product of multiple market segments.

Function -
Soft IPs are build with fide varity of industry standard function which are parameter controlled. Improving the tailor cut feature and thus improve gatecount and poert consumed by device.


Interfaces -
Soft IPs are build with standard bus system and interfaces with wide configuration.

Technology -
Logic is Soft-IP and is technology independent.

Tools Supported -
Logic can work with industry standard tools.

Low Cost

The Cost -
These Self Fault Correcting Soft Digital IPs can be synthesized for any commercial grade device and give tremendous improvement in runtime functional stability of a chip in any harsh environment.

Much more cost saving -
The Cost saving can be vizuallied in other aspect as well like -
1. No Need of bulky Software to keep checking if every thing works perfect.
2. With simple SW, Chips need to run at much less frequency. So, no need of Lower high cost tech nodes.
3. With this smaller SW need, no need of Higher Memory Size.

Overall -
There is tremendous saving in SW Development, Semiconductor Area and High Stable Chips at much lower cost fabrication process can be achieved with this new Fault correcting technology.

Low Power

Self Fault Correcting Logic Power Consumption-
The Self correcting Logical circuit does not consumes additional power in functional runtime. Only in case of faults are encountered and corrected, additional power is consumed.

Power Saving from other improvements-
The Chips built with fault correcting technology are much more reliable and stable and thus does not need any fault correcting SW Support thus decrease need of bulky checking SW routine. This impact power consumption in following way -
1. Decrease in need of MIPS needed to support functional software.
2. Decrease need for higher RAMs and Cache.
3. Decrease in need of large Boot ROM images. Thus decrease in need of large onchip and off chip flash devices.

Overall -
This decrease in need of large silicon area and high speed silicon operation impacts much more decrease in Chip Power Consumption.

Gain Market Value

The Great Product Show -
The technology helps improve the reliability of the chip.

This makes much cleaner market performance impace and decrease in permanent failure of device in real world.

A Win-Win Game -
With the benefits of this technology the market segments like -
1. Autonomous Electronics.
2. Industry 4.0.
3. Space tech.
4. Smart Home
5. Smart Cities.

Can be made profitable old business lines and can evolve new series of reliable product line which can make new business opportunities.

Join hands with us by partnering into the development of this "Technology Independent, Self Correcting, Fault Resistant Technology".

Self Fault Correcting Technology

A Quick FPGA Demonstration

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