Showing all 13 results
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Fault Resistant Key Vault
Call for price Read more1. Fault Resistant Technology to ensure reliable operation.
2. Uses random scramble to store key.
3. Can store key on memory or flipflop Array .
4. Key Size Supported – 128, 192, 256, 384, 512, 1024, 2048 and 4096-bit key storage.Continue Reading -
Fault Resistant Recovery Companion with Single Sequence Recovery
Call for price Read more1. Scan interfacing Block by request response method.
2. Identifies failure stages.
3. Recovers a Failing device.
4. Resets a Failed Device and bring back to operations.
5. Increases product stability.
6. Fault Resistant IP Technology.Continue Reading -
Fault Resistant AES Core
Call for price Read more1. Fault Resistant Technology to ensure reliable operation.
2. Compliant to NIST FIPS-197 Advanced Encryption Standard.
3. Can be programmed to encrypt or decrypt a 128-bit blocks.
4. Key Size Supported – 128-bit, 192-bit or 256-bit key.
5. There is parameter option given to select Processing Size.
6. User can select 8bit, 32bit, 64bit and 128bit processing.Continue Reading -
AES Core
Call for price Read more1. Compliant to NIST FIPS-197 Advanced Encryption Standard.
2. Can be programmed to encrypt or decrypt a 128-bit blocks.
3. 128, 192 and 256-bit Key Size Supported .
4. There is parameter option given to select Processing Size.
5. User can select 8bit, 32bit, 64bit and 128bit processing.
6. Ideal solution for low power applications.
7. Minimum logic resources.Continue Reading -
SOC Stability in Small Package
Call for price View productsPlease look into Technology Post “SOC Stability in a Small Package from GreenIPCore” for understanding benefits of this pack. More Info – Please write on [email protected] for more info. Select IPs For Your ApplicationContinue Reading
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Secure General Purpose Registers
Call for price Read moreGeneral Purpose Resister Built with Data Protection and Redundancy to Store Mission Critical Information in Hidden and Secure Way.Continue Reading
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Fault Resistant, High Stable Timers
Call for price Read moreThese are Noise Resistant, High Stable(NRHS), Configurable Timer Block on AMBA APB/ AHB Interface with wide configuration option to control a Timer and Wide Option to Generate interrupts and Cascade different timers, Scale the clock freq, service them and generate different resets as well.Continue Reading
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Fault Resistant Clock and Reset Monitor
Call for price Read moreThis is a Clock and reset monitor block. It monitors clock and reset signals and report if there are changes in clock beyond a certain range of frequencies and glitches on reset signals.
This IP is built with Fault Resistant technology so it remain stable and right warnings to SOC in case of a Fault Event and Hacking attempts.Continue Reading
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Fault Resistant, High Stable(NRHS) Elastic Buffer
Call for price Read moreThis is a Fault Resistant, High Stable, Generic Elastic Buffer with configurable depth, configurable width. This is capable to transferring data in worst conditions.Continue Reading
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Fault Resistant, High Stable, First In First Out (FIFO) (Sync) with OnChip single Port SRAM
Call for price Read moreThis is a Fault Resistant, High Stable, Generic FIFO with configurable depth, configurable width. This FIFO access external single port memory to store data.Continue Reading
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Fault Resistant High Stable First In First Out (FIFO) (Sync/Async) with OnChip Dual Port SRAM
Call for price Read moreThis is a Fault Resistant, High Stable, Generic FIFO with configurable depth, configurable width, and clock domain crossing options. This FIFO access external dual port memory to store data.Continue Reading
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AMBA-AHB Security
Call for price Read more- Completely Hides the Transactions. No Power Profiling is possible.
- Hides the Data Completely from Debug by changing Key periodically.
- Self managed key. Can be randomized further across devices using Random Number generators.
- Multi level Locking. Multiple master Can operate on single Back Bone with Different Access Levels and Access Regions.
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AMBA-AXI Security
Call for price Read more- Completely Hides the Transactions. No Power Profiling for SPA and DPA is possible once this IP is implemented on SOC.
- Hides the Data Completely from Debug by changing Key periodically.
- Self managed key. Can be randomized further across devices using Random Number generators.
- Multi level Locking. Multiple master Can operate on single Back Bone with Different Access Levels and Access Regions.
