This is Generic Reset Synchronizer Block to synchronize resets.
- Synchronize Resets as per their clock domain.
- Deassert them synchronously to remove any Metastability problems.
- Using Stable and Tested Standard block removes any Reset timing issues of later stages.
- Makes IP More stable to operate.
- Source Code in verilog.
- Test Bench.
- Simulation Scripts.
- Synthesys scripts.
- User Guide.
Internal IP Component Block can be used inside any IP/SOC.
More Info –
Please write on email@example.com for more info.