This is a Configurable Noise Resistant, High Stable(NRHS) Interrupt Controller on AMBA APB/ AHB Interface with wide range to configure synchronous and asynchronous interrupts across SOC and map Different ISR across them. It has option to control and gather different interrupts and set priorities for each of them.
- ICs have a common set of registers.
- There are a number of common priority schemas in PICs including hard priorities, specific priorities, and rotating priorities.
- Interrupts may be either edge triggered or level triggered.
1. Source Code in verilog.
2. Test Bench.
3. Simulation Scripts.
4. Synthesys scripts.
6. User Guide.
More Info –
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